SilTerra Career Website
MEMBER OF TECHNICAL STAFF/ MANAGER - HIGH VOLTAGE DISPLAY & SOURCE DRIVE TECHNOLOGY
FAB INTEGRATION II
Job Details
Job Title
:
MEMBER OF TECHNICAL STAFF/ MANAGER - HIGH VOLTAGE DISPLAY & SOURCE DRIVE TECHNOLOGY
Department
:
FAB INTEGRATION II
Closing Date
:
28-FEB-2018
Job Description
1.Working in semiconductor CMOS high voltage source driver (large panel process) technology involving operating voltage of 1.8/3.3/9/13.5/18V with 8-10 year experiences. 2.Have good knowledge about source driver large panel circuit design, especially on device pitch shrunk and process simplification. 3.Have good understanding of 1.8/3.3/9/13.5/18V devices characteristic and their fabrication process requirement. 4.;Have good knowledge about improving reliability of source driver large panel product DPPM performance through inline process control. 5.Have good knowledge about device architectural of 9/13.5/18V transistor. 6.Have good product engineering understanding of source driver large panel product design that can support in debugging product chip functionality at wafer sort due to inline process control. 7.Able to lead team to work with Research House / Customers to setup large panel process in Silterra. 8.Familiar with tapeout operation which involves generation algorithms writing and electrical testkeys or frame structures generation. 9.Successfully introduce customer Proto-types, optimize processes and nurture through to mass manufacturing phase. 10.Develop and optimize large panel integration Flow for good Manufacturability, Yield & Reliability. 11.Root cause identification of Etest, Sort, FT, Reliability failures and leading the team to implement process fixes. 12.Lead multi-disciplined teams to resolve product and line yield issues by designing and analyzing appropriate experiments. 13.Manage weekly conference calls, quality review boards with customers. 14.Set goals and timelines for engineers and track their progress to completion. 15.Manage multiple projects for process / yield/ defectivity improvements.
Requirements
1.Minimum Bachelors Degree in related field. 2.Preferably in Electrical Electronics/ Microelectronic/ Applied Physics, Sciences 3.Minimum 10 years working experience (for Member of Technical Staff) 4.Preferably those with > 5 years experiences in a wafer fabrication facility and > 3 years experiences in either a Yield Engineering or Integration position or Design related. Skills 1.Data analysis - Proficiency in analysis tools like Jmp, Klarity Defect, Datapower and etc. 2.Risk Management - Strong in decision-making. 3.Device knowledge - Very strong in CIS/CCD Device and process fundamentals. 4.Defect - Understanding of inline defects and their impact in yield and methods of defect controls. 5.Man management - Able to manage engineering staff. 6.8-10 years of experience of which at least 5 years in Yield or Process Integration. 7.Communication - Excellent written and oral communication skills. Knowledge of Mandarin is an advantage.
SHARE ON
LOG IN
|
ABOUT US