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MEMBER OF TECHNICAL STAFF/ PRINCIPAL ENGINEER/ SECTION MANAGER - CIS (CMOS IMAGE SENSOR)
FAB INTEGRATION II
Job Details
Job Title
:
MEMBER OF TECHNICAL STAFF/ PRINCIPAL ENGINEER/ SECTION MANAGER - CIS (CMOS IMAGE SENSOR)
Department
:
FAB INTEGRATION II
Closing Date
:
31-DEC-2017
Job Description
1.Working in semiconductor CMOS Imaging Sensors (CIS) and/or Charge-Coupled Device (CCD) field for about 8-10 years. 2.Have good knowledge about CIS/CCD circuit design, especially about Pixel design. 3.Have good understanding of CIS/CCD devices characteristic and their fabrication process requirement. 4.Have good knowledge about the Dark current performance requirement, its process control and process cross contamination requirement. 5.Have good knowledge about Large Die Stitching, FSI (Front Side Imaging) and BSI (Back Side Imaging) will be advantage. 6.Able to lead team to work with Research House / Customers to setup CIS/CCD technology in Silterra. 7.Successfully introduce customer Proto-types, optimize processes and nurture through to mass manufacturing phase. 8.Develop and optimize CIS/CCD Integration Flow for good Manufacturability, Yield & Reliability. 9.Root cause identification of Etest, Sort, FT, Reliability failures and leading the team to implement process fixes. 10.ad multi-disciplined teams to resolve product and line yield issues by designing and analyzing appropriate experiments. 11.Manage weekly conference calls, quality review boards with customers. 12.Set goals and timelines for engineers and track their progress to completion. 13.Manage multiple projects for process / yield/ defectivity improvements.
Requirements
1.Minimum Bachelors Degree in related field. 2.Preferably in Electrical Electronics/ Microelectronic/ Applied Physics, Sciences 3.Minimum 10 years working experience (for Member of Technical Staff) 4.Preferably those with > 5 years experiences in a wafer fabrication facility and 3 years experiences in either a Yield Engineering or Integration position or Design related. Skill 1.Data analysis - Proficiency in analysis tools like Jmp, Klarity Defect, Datapower and etc. 2.Risk Management - Strong in decision-making. 3.Device knowledge - Very strong in CIS/CCD Device and process fundamentals. 4.Defect - Understanding of inline defects and their impact in yield and methods of defect Controls 5.Man management - Able to manage engineering staff. 6.8-10 years of experience of which at least 5 years in Yield or Process Integration. 7.Communication - Excellent written and oral communication skills.
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